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sunxi: Set AHB1 clock to PLL6/3 on all clock_sun6i.h using SoCs
authorHans de Goede <[email protected]>
Fri, 20 Nov 2015 18:29:49 +0000 (19:29 +0100)
committerHans de Goede <[email protected]>
Thu, 10 Dec 2015 10:14:16 +0000 (11:14 +0100)
commitcbc1a91afb7fb0f096453e5574bc5c0719c6c9c4
tree9fb14aefe0f3eb502d335f4183b6eb65a71c17b0tree | snapshot
parent789fa275b3750e60c60cb3d18eabc9467892c257commit | diff
sunxi: Set AHB1 clock to PLL6/3 on all clock_sun6i.h using SoCs

According to the datasheets the max speed of AHB1 is 276 MHz, so
setting it to PLL6 / 3 which gives us 200MHz everywhere is fine,
and gives us a nice speed-up in certain workloads.

Suggested-by: Chen-Yu Tsai <[email protected]>
Signed-off-by: Hans de Goede <[email protected]>
Acked-by: Ian Campbell <[email protected]>
Tested-by: Chen-Yu Tsai <[email protected]>
arch/arm/include/asm/arch-sunxi/clock_sun6i.h diff | blob | history
Broadcom-s U-Boot